Chúc mừng sinh viên nhóm nghiên cứu UiTiOt Khoa MMT&TT có bài báo được chấp nhận tại Hội nghị ICDV 2025

07/05/2025 - 08:01

Bài báo: DDoS Attack Detection for Software-Defined Network Architecture Based on Artificial Intelligence

Sinh viên thực hiện:

- Phạm Thái Bảo – ATCL2021 – Tác giả chính

- Nguyễn Lê Hạ My – MMTT2023.2 – Đồng tác giả

Giảng viên hướng dẫn:

- PGS. TS. Lê Trung Quân

- ThS. Nguyễn Khánh Thuật

- ThS. Văn Thiên Luân

Tóm tắt:

The Software-Defined Networking (SDN) model provides significant advantages for network administrators by facilitating traffic initialization, control, and management. SDN optimizes bandwidth and resource utilization through efficient traffic routing and network management automation. Distributed Denial-of-Service (DDoS) attacks target websites and servers by disrupting network services and depleting application resources. In SDN, control functions are centralized in the control plane, while network devices handle packet forwarding. DDoS attacks in SDN impact all network layers, exploiting bandwidth and limiting infrastructure scalability. To mitigate DDoS attacks, Artificial Intelligence (AI)-based approaches, specifically Machine Learning (ML) and Deep Learning (DL), are integrated into Intrusion Detection and Prevention Systems for enhanced detection and response. Our proposed approach involves building an SDN network architecture, collecting traffic, and utilizing ML and DL models for DDoS detection. In ML models, feature extraction is performed before classification, while DL models preprocess network traffic by normalizing and converting it into images for classification. Among the evaluated models, Random Forest (RF) and DenseNet demonstrated the best performance, achieving a high accuracy of 99.87% and 99.4% while excelling in training time, inference speed, and model size.

Thông tin Hội nghị:

The International Conference on Integrated Circuits, Design, and Verification (ICDV) provides a forum for exchanging ideas, discussing research results, and presenting chips, circuit designs and applications in solid-state and semiconductor fields. Continuous scaling of the CMOS devices increases the number of transistors on a VLSI chip. It reaches the level of 100 giga transistors on a single chip, which is comparatively higher than the total neuron numbers in the human brain. This would certainly provide a great opportunity for new applications and information processing. On the other hand, the small feature size causes new problems, such as leakage current and process variation. To discuss utilizing the scaling advantages and coping with the new problems, we call for contributions about new proposal of application systems, VLSI architectures, and design methodologies as well as the technologies and applications in the integrated circuits and devices field. We expect this conference to explore and stimulate the contributed research on those subjects. The papers are solicited from prospective authors interested in the related fields.

The ICDV 2025 conference is organized by IEEE CAS Vietnam Chapter, co-hosted by Vietnam National University Ho Chi Minh City – The University of Science (VNUHCM-US), technically supported by the IEEE SSCS Vietnam and the IEICE Vietnam Section. The ICDV 2025 will be held in Ho Chi Minh City, Vietnam. Further information about the conference, paper submission guidelines and templates will be updated on the website.

Link hội nghị: https://icdv-conf.org/